- Professor of Systems, Security, and Architecture
I am Professor of Systems, Security, and Architecture at the University of Cambridge Department of Computer Science and Technology. I am involved in several research groups at the lab, including Security, Networks and Operating Systems, and Computer Architecture. I lead cross-layer research projects spanning computer architecture, compilers, program analysis, program transformation, operating systems, networking, and security.
I proposed, and along with colleagues Peter G. Neumann (SRI International), Simon W. Moore (Cambridge), Peter Sewell (Cambridge), and Brooks Davis (SRI International) lead, the CHERI architecture project, a new processor protection model incorporated into Arm prototype Morello processor, SoC, and board, as well as a number of CHERI-extended RISC-V based products from other vendors anticipated to ship in 2025-2026. The CHERI model incorporates support for fine-grained memory safety and scalable software compartmentalisation into contemporary computer architectures, microarchitectures, compilers, and OS/application software. CHERI has been the subject of over $250M in US and UK government and industry R&D investment since 2010.
I teach in the areas of security and operating systems across our undergraduate and masters degrees. I have a resarch team of around a dozen PhD students, postdocs, and research engineers working across a variety of research areas. I have strong interests in open-source software, am on the board of directors of the FreeBSD Foundation and CHERI Alliance CIC. I am a coauthor on the Design and Implementation of the FreeBSD Operating System (second edition) published by Pearson. I am co-director, with Ben Laurie, of Capabilities Limited, a lab spinout of around 15 staff members focused on CHERI adoption.
