- Research Staff
Research
My research mainly focuses on applying CHERI to the RISC-V architecture.
My PhD thesis is available at Apollo or as a tech report.
Teaching
Part II Projects I've supervised:
- "Parallelising sequence alignment" (2019-20),
- "Dynamic Binary Translator from Arm to RISC-V" (2020-21),
- "CHERI for a Barrel Processor" (2023-24),
- "Pointer-Following Prefetching in a CHERI System" (2023-24),
- "A Perceptron-Based Branch Predictor for Toooba" (2024-25),
- "Parallelisation of All-Pairs Shortest Path Algorithms" (2024-25).
I supervise for a range of colleges, including for Lucy Cavendish as a teaching bye-fellow.
Courses I've supervised: Digital Electronics, Discrete Maths, Introduction to Architecture, Advanced Computer Architecture, Cybersecurity, Cryptography, Hoare Logic and Model Checking.
I also demonstrate for the ECAD and Cybersecurity practical labs.
