Richardson, A., 2020 (No publication date). Complete spatial safety for C and C++ using CHERI capabilities Doi: 10.17863/CAM.54548
Conference proceedings
Dodson, M., Beresford, AR., Richardson, A., Clarke, J. and Watson, RNM., 2020. CHERI Macaroons: Efficient, host-based access control for cyber-physical systems Proceedings - 5th IEEE European Symposium on Security and Privacy Workshops, Euro S and PW 2020, Doi: 10.1109/EuroSPW51379.2020.00099
Wesley Filardo, N., Gutstein, BF., Woodruff, J., Ainsworth, S., Paul-Trifu, L., Davis, B., Xia, H., Tomasz Napierala, E., Richardson, A., Baldwin, J., Chisnall, D., Clarke, J., Gudka, K., Joannou, A., Theodore Markettos, A., Mazzinghi, A., Norton, RM., Roe, M., Sewell, P., Son, S., Jones, TM., Moore, SW., Neumann, PG. and Watson, RNM., 2020. Cornucopia: Temporal safety for CHERI heaps Proceedings - IEEE Symposium on Security and Privacy, v. 2020-May Doi: 10.1109/SP40000.2020.00098
Xia, H., Woodruff, J., Barral, H., Esswood, L., Joannou, A., Kovacsics, R., Chisnall, D., Roe, M., Davis, B., Napierala, E., Baldwin, J., Gudka, K., Neumann, PG., Richardson, A., Moore, SW. and Watson, RNM., 2019. CheriRTOS: A Capability Model for Embedded Devices Proceedings - 2018 IEEE 36th International Conference on Computer Design, ICCD 2018, Doi: 10.1109/ICCD.2018.00023
Davis, B., Watson, RNM., Richardson, A., Neumann, PG., Moore, SW., Baldwin, J., Chisnall, D., Clarke, J., Filardo, NW., Gudka, K., Joannou, A., Laurie, B., Markettos, AT., Maste, JE., Mazzinghi, A., Napierala, ET., Norton, RM., Roe, M., Sewell, P., Son, S. and Woodruff, J., 2019. CheriABI: Enforcing Valid Pointer Provenance and Minimizing Pointer Privilege in the POSIX C Run-time Environment International Conference on Architectural Support for Programming Languages and Operating Systems - ASPLOS, Doi: 10.1145/3297858.3304042
Xia, H., Woodruff, J., Ainsworth, S., Filardo, NW., Roe, M., Richardson, A., Rugg, P., Neumann, PG., Moore, SW., Watson, RNM. and Jones, TM., 2019. CHERIvoke: Characterising pointer revocation using CHERI capabilities for temporal memory safety Proceedings of the Annual International Symposium on Microarchitecture, MICRO, Doi: 10.1145/3352460.3358288
Joannou, A., Woodruff, J., Kovacsics, R., Moore, SW., Bradbury, A., Xia, H., Watson, RNM., Chisnall, D., Roe, M., Davis, B., Napierala, E., Baldwin, J., Gudka, K., Neumann, PG., Mazzinghi, A., Richardson, A., Son, S. and Markettos, AT., 2017. Efficient tagged memory Proceedings - 35th IEEE International Conference on Computer Design, ICCD 2017, Doi: 10.1109/ICCD.2017.112
Achermann, R., Dalton, C., Faraboschi, P., Hoffmann, M., Milojicic, D., Ndu, G., Richardson, A., Roscoe, T., Shaw, AL. and Watson, RNM., 2017. Separating Translation from Protection in Address Spaces with Dynamic Remapping Proceedings of the Workshop on Hot Topics in Operating Systems - HOTOS, v. Part F129307 Doi: 10.1145/3102980.3103000
Gudka, K., Watson, RNM., Anderson, J., Chisnall, D., Davis, B., Laurie, B., Marinos, I., Neumann, PG. and Richardson, A., 2015. Clean application compartmentalization with SOAAP Proceedings of the ACM Conference on Computer and Communications Security, v. 2015-October Doi: 10.1145/2810103.2813611
Datasets
Filardo, N., Gutstein, B., Woodruff, J., Ainsworth, S., Paul-Trifu, L., Davis, B., Xia, H., Napierala, E., Richardson, A., Baldwin, J., Chisnall, D., Clarke, J., Gudka, K., Joannou, A., Markettos, AT., Mazzinghi, A., Norton, RM., Roe, M., Sewell, P., Son, S., Jones, TM., Moore, SW., Neumann, PG. and Watson, RNM., 2020. Research data supporting 'Cornucopia: Temporal Safety for CHERI Heaps' Doi: 10.17863/CAM.51028
Xia, H., Woodruff, J., Ainsworth, S., Filardo, N., Roe, M., Richardson, A., Rugg, P., Neumann, P., Moore, S., Watson, R. and Jones, T., 2019. Research data supporting "CHERIvoke: Characterising Pointer Revocation using CHERI Capabilities for Temporal Memory Safety" Doi: 10.17863/CAM.42436
Journal articles
Memarian, K., Gomes, VBF., Davis, B., Kell, S., Richardson, A., Watson, RNM. and Sewell, P., 2019. Exploring C semantics and pointer provenance Proceedings of the ACM on Programming Languages, v. 3 Doi: 10.1145/3290380
Azriel, L., Humbel, L., Achermann, R., Richardson, A., Hoffmann, M., Mendelson, A., Roscoe, T., Watson, RNM., Faraboschi, P. and Milojicic, D., 2019. Memory-Side Protection With a Capability Enforcement Co-Processor ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION, v. 16 Doi: 10.1145/3302257