One of the themes of my research has been and continues to be the exploitation of parallelism in its many forms. I’ve looked into data-level parallelism by improving the performance of SLP by, for example, reducing the number of instructions that are vectorised and (spoiler alert for a future publication) I have a PhD student working on speculative vectorisation. With Sam Ainsworth , formerly my PhD student, now a postdoc, I have published research that exploits memory-level parallelism within the compiler , architecture and in both with a programmable prefetcher . We’ve also looked into taking advantage of parallelism for error detection . However, the first work I did in this area, and the kind of work...
