Blogs

On Monday we held a memorial event in Emmanuel College for my PhD student, Negar , who died so tragically in October last year. These are the words I said in memory of her.

The first time I talked to Negar was just over 5 years ago, in May 2012. I can remember it vividly, sitting in Alan Mycroft’s office phoning Iran to interview a candidate for a job on hardware reliability. She came across as a quiet person who was unflustered by the questions that we threw at her. And behind that a determination too, a determination to secure the job, to come to Cambridge and achieve her ambition...

My student, Sam Ainsworth , has won first prize in the student research competition at EuroLLVM 2017 . This work was previously published at CGO 2017 and I’ve blogged about it too. Below is a copy of his poster, or download it here . Well done, Sam!

I’ve always considered software prefetching to be something of a black art. There have been times in the past when I’ve looked at my code, noticed a load is causing problems and tried inserting one or more software prefetches to alleviate the issue. Mostly this hasn’t worked, although I’ve never been sure why. In fact, even when it has worked I haven’t been totally sure why it has, usually because it’s involved a lot of trial and error in trying out different options before I hit on improved performance.

Now it turns out that most of the time I was probably trying to prefetch the wrong things. Trying to prefetch linked data structures, which are those that involve pointer chasing (like a linked list),...

I started blogging in October 2015 with the aim of publicising my group’s research a little more, having a space to write about topics and work that weren’t going to be published, and delving into our research results in more detail than possible in a page-constrained article. A year on, I wanted to look back and see how things had gone in my first year as a lecturer, but the events of this October overtook me. Now, at the end of the calendar year when everything is calmer, it seems like a good opportunity to summarise the last twelve months and point to blog posts written and events that I didn’t find time to talk about. Given the season I’ll try not to make it...

It’s with immense sadness that I write about my PhD student, Negar Miralaei, who died in an accident back home in Iran on the 26th October. She will be sorely missed within my group and by everyone within the Computer Laboratory. Many tributes have been paid to her warmth, kindness and dedication to her research. You can read those from the Computer Lab and Varsity , for example.

Despite this being a short post, it has taken me nearly two weeks to write, such is the shock, sorrow and emptiness I have felt since being told the tragic news. Negar was a ray of sunshine in our group, always smiling, even in the face of adversity. She was...

This post is about my group’s second ICS paper from June this year, which describes a new single producer / single consumer (SP/SC) software queue that we developed for frequent inter-core communication. It’s faster than existing implementations and we call it Lynx . It’s available on my group’s data page .

Initially, we didn’t set out to create a new queue. We were experimenting with transient error detection techniques in software. Transient, or soft, errors are faults that occur sporadically within a microprocessor, causing a data value or instruction to change. They are the result of strikes to the chip from cosmic rays (or usually the secondary particles they excite) or alpha particles from...

This week sees the publication of two papers from my research group at ICS 2016 and so, in this post, I’d like to look a little more into one of these schemes: the graph prefetcher that my student, Sam, has developed.

Graph workloads are important in a number of domains, and becoming increasingly so. You only have to look at the numerous social media applications to see examples of graph-based data (e.g. in a network of people, each person is a vertex and the edges represent links to friends). But graph representations are also significant in less publicly-visible application areas, such as those in scientific computing or “big data” analytics. However, efficient processing of graph workloads is often...

Today was the annual Wheeler lecture at the Computer Laboratory, and before the main event, a talk by Andrew Herbert, there was a Minute Madness where people from across the Lab, ranging from MPhil students through to professors, talked for one minute about their research with a single slide as a prop. My slide and something approximating the words I used are below.

“Hello! My group works on ways of making applications go faster, through a technique called program parallelisation.

If you look on the left of the slide, the red wavy arrow represents a regular sequential application with a single thread of execution within it. This means that instructions execute one...

My eldest son likes collecting things. Of course all children seem to like picking up random objects and hoarding them forever, and we’ve had our fair share of leaves, stones, food wrappers and other assorted paraphernalia floating around the house until we can divert attention elsewhere and get rid of them. But my son also really likes collecting sets of toys, books and, currently, stickers.

He first got into this during the World Cup in 2014 when I thought he was old enough to really enjoy collecting the stickers of all the players and teams that you find in the famous Panini sticker album that’s published before each competition. I remember collecting these when I was growing up; the excitement at opening each pack...

One of the most important parts of our HELIX compiler is the data dependence analysis we run on the compiler’s IR to determine which instructions are independent of each other. You can read more about HELIX in general in our original CGO 2012 paper (click through my publications page to get free access to the ACM version).

HELIX’s initial data dependence pass is split into two phases, and it’s the memory alias analysis stage that is most interesting. This has the job of identifying the locations in memory that are read and written by each instruction so that we can respect all data dependences within the loops we parallelise. Since alias analysis is not precise, we need to...