Blogs

Once again a major football tournament is approaching and my son is collecting stickers of all the teams who have reached the finals. This time it’s the World Cup in Russia and the album published by Panini has 682 to collect. I’ve blogged before about the maths behind collecting stickers so you can calculate how many packets of five distinct stickers you expect to need to finish it. At the time, to help me visualise this, I wrote a web page with a bit of JavaScript on it to do the calculations. This time I’ve looked over it again and increased its functionality a little, so I’ve decided it’s robust enough to advertise. It’s on my main university site...

Over the last few years my PhD student, Sam Ainsworth , and I have been looking into data prefetching, especially for applications containing irregular memory accesses. We published a paper in ICS 2016 about a specialised hardware prefetcher that optimises breadth-first traversals on graphs in the commonly-used compressed sparse-row format, which I previously blogged about . We also published a paper at CGO on automatic software-prefetch generation, more generally for indirect memory accesses ( blog post ). At ASPLOS this year, we marry the two ideas together and generalise even further, creating a programmable prefetcher, using an event-driven programming model, that is capable of fetching in data for many types of memory access, complete...

Today I’m joining a college. Or, to be more precise, at a ceremony later this afternoon I’ll be admitted as a fellow to Gonville and Caius college .

Now the questions you might ask are why, and why aren’t you part of a college already—this is Cambridge after all and it’s all about the colleges, isn’t it?

Actually it’s not. In Cambridge you don’t have to be part of a college. All students are, both undergraduate and postgraduate. Postdocs generally aren’t, although some colleges make provision for a small number of postdocs to be part of their community. Lecturers, readers and professors can choose whether to be part of a college or not....

Over the past few years I’ve become increasingly interested in dynamic binary modification (DBM) tools, so much so that I supervise a PhD student who is trying to parallelise binaries using one, and am just starting work on a grant that continues and extends this work . On Intel’s architecture, Pin is probably the most famous tool, and one that I had most experience of in the past. (As an aside, Pin is a dynamic binary instrumentation tool, but I’m going to use modification instead of instrumentation throughout this post, since modification subsumes instrumentation and I’m more interested in optimisation than just analysis.) However, it’s closed source and only targets Intel’s ISAs. Another option is ...

On Monday we held a memorial event in Emmanuel College for my PhD student, Negar , who died so tragically in October last year. These are the words I said in memory of her.

The first time I talked to Negar was just over 5 years ago, in May 2012. I can remember it vividly, sitting in Alan Mycroft’s office phoning Iran to interview a candidate for a job on hardware reliability. She came across as a quiet person who was unflustered by the questions that we threw at her. And behind that a determination too, a determination to secure the job, to come to Cambridge and achieve her ambition...

My student, Sam Ainsworth , has won first prize in the student research competition at EuroLLVM 2017 . This work was previously published at CGO 2017 and I’ve blogged about it too. Below is a copy of his poster, or download it here . Well done, Sam!

I’ve always considered software prefetching to be something of a black art. There have been times in the past when I’ve looked at my code, noticed a load is causing problems and tried inserting one or more software prefetches to alleviate the issue. Mostly this hasn’t worked, although I’ve never been sure why. In fact, even when it has worked I haven’t been totally sure why it has, usually because it’s involved a lot of trial and error in trying out different options before I hit on improved performance.

Now it turns out that most of the time I was probably trying to prefetch the wrong things. Trying to prefetch linked data structures, which are those that involve pointer chasing (like a linked list),...

I started blogging in October 2015 with the aim of publicising my group’s research a little more, having a space to write about topics and work that weren’t going to be published, and delving into our research results in more detail than possible in a page-constrained article. A year on, I wanted to look back and see how things had gone in my first year as a lecturer, but the events of this October overtook me. Now, at the end of the calendar year when everything is calmer, it seems like a good opportunity to summarise the last twelve months and point to blog posts written and events that I didn’t find time to talk about. Given the season I’ll try not to make it...

It’s with immense sadness that I write about my PhD student, Negar Miralaei, who died in an accident back home in Iran on the 26th October. She will be sorely missed within my group and by everyone within the Computer Laboratory. Many tributes have been paid to her warmth, kindness and dedication to her research. You can read those from the Computer Lab and Varsity , for example.

Despite this being a short post, it has taken me nearly two weeks to write, such is the shock, sorrow and emptiness I have felt since being told the tragic news. Negar was a ray of sunshine in our group, always smiling, even in the face of adversity. She was...

This post is about my group’s second ICS paper from June this year, which describes a new single producer / single consumer (SP/SC) software queue that we developed for frequent inter-core communication. It’s faster than existing implementations and we call it Lynx . It’s available on my group’s data page .

Initially, we didn’t set out to create a new queue. We were experimenting with transient error detection techniques in software. Transient, or soft, errors are faults that occur sporadically within a microprocessor, causing a data value or instruction to change. They are the result of strikes to the chip from cosmic rays (or usually the secondary particles they excite) or alpha particles from...