skip to content

Department of Computer Science and Technology

Boosting Performance By Limiting Vectorisation

27 October 2015

It sounds a bit counter-intuitive, but boosting application performance by limiting the amount of vectorisation carried out is essentially what my postdoc, Vasileios Porpodas, and I have done in our latest paper on automatic vectorisation. We call it TSLP, or Throttled SLP, because it limits the amount of scalar code that the standard SLP algorithm converts into vectors.

The actual paper is available here . Vasileios presented it at PACT last week and will be at the LLVM Developers’ Meeting this week, so I thought it might be interesting to expand on one of the examples we give at the end, showing the source code and how it is actually vectorised with SLP and TSLP. The kernel is compute-rhs, which is a...

Read more

Hello World!

1 October 2015

Today is the first day I’m officially employed as a University Lecturer , so it seems appropriate for my research blog to be born right now. It’s going to be a bit of an experiment (as you’d expect), but hopefully a place where I can describe the research my group is undertaking in more detail, in a different way to how it’s presented in our papers, and with interesting results that we don’t intend to publish in any conference or journal. My aim is to make the research more accessible and informal than our academic articles. Let’s see how I get on!

Cheers Tim

Read more