2025
Cheng, J., Markettos, AT., Joannou, A., Metzger, P., Naylor, M., Rugg, P. and Jones, TM., 2025. Adaptive CHERI Compartmentalization for Heterogeneous Accelerators Proceedings International Symposium on Computer Architecture,
Doi: 10.1145/3695053.3731062
2024
Naylor, M., Joannou, A., Markettos, AT., Metzger, P., Moore, SW. and Jones, TM., 2024. Advanced Dynamic Scalarisation for RISC-V GPGPUs Proceedings IEEE International Conference on Computer Design VLSI in Computers and Processors,
Doi: 10.1109/ICCD63220.2024.00047
2021
Naylor, M., Moore, SW., Thomas, D., Beaumont, JR., Fleming, S., Vousden, M., Markettos, AT., Bytheway, T. and Brown, A., 2021. General hardware multicasting for fine-grained message-passing architectures Proceedings 29th Euromicro International Conference on Parallel Distributed and Network Based Processing Pdp 2021,
Doi: 10.1109/PDP52278.2021.00028
2020
Wesley Filardo, N., Gutstein, BF., Woodruff, J., Ainsworth, S., Paul-Trifu, L., Davis, B., Xia, H., Tomasz Napierala, E., Richardson, A., Baldwin, J., Chisnall, D., Clarke, J., Gudka, K., Joannou, A., Theodore Markettos, A., Mazzinghi, A., Norton, RM., Roe, M., Sewell, P., Son, S., Jones, TM., Moore, SW., Neumann, PG. and Watson, RNM., 2020. Cornucopia: Temporal safety for CHERI heaps Proceedings IEEE Symposium on Security and Privacy, v. 2020-May
Doi: 10.1109/SP40000.2020.00098
Markettos, AT., Baldwin, J., Bukin, R., Neumann, PG., Moore, SW. and Watson, RNM., 2020. Position Paper:Defending Direct Memory Access with CHERI Capabilities ACM International Conference Proceeding Series,
Doi: 10.1145/3458903.3458910
Naylor, M., Moore, S., Mokhov, A., Thomas, D., Beaumont, J., Fleming, S., Markettos, AT., Bytheway, T. and Brown, A., 2020. Termination detection for fine-grained message-passing architectures 2020 IEEE 31st International Conference on Application-specific Systems, Architectures and Processors (ASAP),
Doi: 10.1109/ASAP49362.2020.00012
2019
Davis, B., Watson, RNM., Richardson, A., Neumann, PG., Moore, SW., Baldwin, J., Chisnall, D., Clarke, J., Filardo, NW., Gudka, K., Joannou, A., Laurie, B., Markettos, AT., Maste, JE., Mazzinghi, A., Napierala, ET., Norton, RM., Roe, M., Sewell, P., Son, S. and Woodruff, J., 2019. CheriABI: Enforcing Valid Pointer Provenance and Minimizing Pointer Privilege in the POSIX C Run-time Environment International Conference on Architectural Support for Programming Languages and Operating Systems ASPLOS,
Doi: 10.1145/3297858.3304042
2018 (Accepted for publication)
Markettos, AT., Rothwell, C., Gutstein, BF., Pearce, A., Neumann, PG., Moore, SW. and Watson, RNM., 2018 (Accepted for publication). Thunderclap: Exploring Vulnerabilities in Operating System IOMMU Protection via DMA from Untrustworthy Peripherals
Doi: 10.14722/ndss.2019.23194
2017
Chisnall, D., Davis, B., Gudka, K., Brazdil, D., Joannou, A., Woodruff, J., Markettos, AT., Maste, JE., Norton, R., Son, S., Roe, M., Moore, SW., Neumann, PG., Laurie, B. and Watson, RNM., 2017. CHERI JNI: Sinking the Java Security Model into the C OPERATING SYSTEMS REVIEW, v. 51
Doi: 10.1145/3037697.3037725
Joannou, A., Woodruff, J., Kovacsics, R., Moore, SW., Bradbury, A., Xia, H., Watson, RNM., Chisnall, D., Roe, M., Davis, B., Napierala, E., Baldwin, J., Gudka, K., Neumann, PG., Mazzinghi, A., Richardson, A., Son, S. and Markettos, AT., 2017. Efficient tagged memory Proceedings 35th IEEE International Conference on Computer Design Iccd 2017,
Doi: 10.1109/ICCD.2017.112
2016 (Accepted for publication)
Chisnall, DT., Davis, B., Gudka, K., Brazdil, D., Joannou, A., Woodruff, J., Markettos, AT., Maste, JE., Norton, R., Son, S., Roe, M., Moore, SW., Neumann, PG., Laurie, B. and Watson, RNM., 2016 (Accepted for publication). CHERI JNI: Sinking the Java security model into the C Proceedings of the Twenty-Second International Conference on Architectural Support for Programming Languages and Operating Systems,
2016
Markettos, AT., Moore, SW., Jones, BD., Spliet, R. and Gavrila, VA., 2016. Conquering the complexity mountain: Full-stack computer architecture teaching with FPGAs 2016 11th European Workshop on Microelectronics Education, EWME 2016,
Doi: 10.1109/EWME.2016.7496457
2014
Fox, PJ., Markettos, AT. and Moore, SW., 2014. Reliably prototyping large SoCs using FPGA clusters 2014 9th International Symposium on Reconfigurable and Communication Centric Systems on Chip Recosoc 2014,
Doi: 10.1109/ReCoSoC.2014.6861350
Markettos, AT., Fox, PJ., Moore, SW. and Moore, AW., 2014. Interconnect for commodity FPGA clusters: Standardized or customized? Conference Digest 24th International Conference on Field Programmable Logic and Applications Fpl 2014,
Doi: 10.1109/FPL.2014.6927472
2013
Naylor, M., Fox, PJ., Markettos, AT. and Moore, SW., 2013. A spiking neural network on a portable FPGA tablet 2013 23rd International Conference on Field Programmable Logic and Applications Fpl 2013 Proceedings,
Doi: 10.1109/FPL.2013.6645629
Naylor, M., Fox, PJ., Markettos, AT. and Moore, SW., 2013. Managing the FPGA memory wall: Custom computing or vector processing? 2013 23rd International Conference on Field Programmable Logic and Applications Fpl 2013 Proceedings,
Doi: 10.1109/FPL.2013.6645538
Woodruff, J., Markettos, AT. and Moore, SW., 2013. A 64-bit MIPS processor running freebsd on a portable FPGA tablet 2013 23rd International Conference on Field Programmable Logic and Applications Fpl 2013 Proceedings,
Doi: 10.1109/FPL.2013.6645630
2012
Moore, SW., Fox, PJ., Marsh, SJT., Markettos, AT. and Mujumdar, A., 2012. Bluehive - A field-programable custom computing machine for extreme-scale real-time neural network simulation Proceedings of the 2012 IEEE 20th International Symposium on Field Programmable Custom Computing Machines Fccm 2012,
Doi: 10.1109/FCCM.2012.32
2009
Markettos, AT. and Moore, SW., 2009. The Frequency Injection Attack on Ring-Oscillator-Based True Random Number Generators CRYPTOGRAPHIC HARDWARE AND EMBEDDED SYSTEMS - CHES 2009, PROCEEDINGS, v. 5747
2005
Li, HY., Markettos, AT. and Moore, S., 2005. Security evaluation against electromagnetic analysis at design time CRYPTOGRAPHIC HARDWARE AND EMBEDDED SYSTEMS - CHES 2005, PROCEEDINGS, v. 3659
Li, HY., Markettos, AT. and Moore, S., 2005. Security evaluation against electromagnetic analysis at design time HLDVT'05: TENTH ANNUAL IEEE INTERNATIONAL HIGH-LEVEL DESIGN VALIDATION AND TEST WORKSHOP, PROCEEDINGS,
Li, HY., Markettos, AT. and Moore, S., 2005. A security evaluation methodology for smart cards agnaist electromagnetic analysis 39TH ANNUAL 2005 INTERNATIONAL CARNAHAN CONFERENCE ON SECURITY TECHNOLOGY, PROCEEDINGS,
