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Department of Computer Science and Technology

  • Physical Attacks and Supply chain Security (PASS) Technical leader

I am currently a University of Cambridge EPSRC Impact Acceleration Account Partnership Award Project Lead on Physical Attacks and Supply-chain Security (matched by an industrial partner), a By-Fellow at Churchill College, a Department of Computer Science and Technology Research Associate and CEO and Founder of Ethicronics Limited. I am also the initiator of #Electhical, an industry forum on technology and policy for electronics low TOTAL footprint and hardware security.

Biography

Recipent of 3 Masters (MEng. St-Etienne, MPhil. Uni of Glasgow, MRes. INSA Lyon) and a PhD from the Ecole des Mines de Saint-Etienne I have 10+ years work experience in hardware-enabled cybersecurity (ex-Thales DIS and ex-Isaac Newton Trust/Leverhulme Trust Early Career Fellow, University of Cambridge) focusing on hardware reverse engineering, fault attacks, memory content extraction, tamper protection/evidence and supply chain security.

Research

Security and Privacy by design

Hardware AI/Edge Computing security

Open hardware/RISC-V security 

Physical attacks and protection

Supply-chain Security

Teaching

Undergraduates and Postgraduates Tripos and Projects Supervisions (Department of Computer Science and Technology, Department of Engineering, Department of Physics)

Publications

Journal articles

  • Courbon, F., 2020. Practical Partial Hardware Reverse Engineering Analysis Journal of Hardware and Systems Security, v. 4
    Doi: http://doi.org/10.1007/s41635-019-00068-8
  • Courbon, F., Fournier, JJA., Loubet-Moundi, P. and Tria, A., 2015. Combining Image Processing and Laser Fault Injections for Characterizing a Hardware AES IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, v. 34
    Doi: http://doi.org/10.1109/tcad.2015.2391773
  • Conference proceedings

  • Courbon, F., Skorobogatov, S. and Woods, C., 2016. Direct charge measurement in Floating Gate transistors of Flash EEPROM using Scanning Electron Microscopy Email a friend ISTFA 2016 Proceedings from the 42nd International Symposium for Testing and Failure Analysis,
  • Courbon, F., Loubet-Moundi, P., Fournier, JJA. and Tria, A., 2015. A High Efficiency Hardware Trojan Detection Technique Based on Fast SEM Imaging Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015,
    Doi: 10.7873/date.2015.1104
  • Courbon, F., Loubet-Moundi, P., Fournier, JJA. and Tria, A., 2014. Increasing the efficiency of laser fault injections using fast gate level reverse engineering 2014 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST),
    Doi: http://doi.org/10.1109/hst.2014.6855569
  • Courbon, F., Skorobogatov, S. and Woods, C., Reverse engineering Flash EEPROM memories using Scanning Electron Microscopy CARDIS 2016: Smart Card Research and Advanced Applications,
    Doi: 10.1007/978-3-319-54669-8_4
  • Courbon, FR., In-House Transistors’ Layer Reverse Engineering Characterization of a 45nm SoC
  • Courbon, FR., Challenges and examples of in-situ memory content extraction techniques
  • Courbon, F., Loubet-Moundi, P., Fournier, JJA. and Tria, A., Adjusting Laser Injections for Fully Controlled Faults Lecture Notes in Computer Science, v. 8622
    Doi: http://doi.org/10.1007/978-3-319-10175-0_16
  • Contact Details

    Room: 
    GE06
    Office phone: 
    (01223) 7-63837
    Email: 

    frc26@cam.ac.uk